SoC设计团队通常分为前端和后端，而为了在前端设计中提前处理、解决后端问题去合并这两个分工通常被认为是不可取，也是不明智的。然而，有一个常见的问 题是，在布局阶段很难发现具体的问题所在，除非设计团队准备再次从头到尾地对设计进行彻底地检查。而终的结果是——要么忍受布局中缺陷，要么延长设计时 间，但这可能导致团队失去这笔生意。

如果我们有一个自动化的方式让前端工程师了解物理设计，并且有工具可以在RTL级的时候来修复和调试的话，就不需要繁琐的后端设计了，因为在RTL级的时 候就可以修复物理设计问题。高质量的RTL将顺利通过后端验证工具，而且在布局阶段，物理综合以及相关的布局、布线不会出现严重的问题。下面一起来看一个 具体的例子：

Multiplexers (Mux) are very common in designs. A wide mux can contain a large number of inputs and a single output whereas a deep mux can contain a large number of select lines. The complexity created by a wide and deep mux can have severe implications in routability down the stream which in-turn can cause several issues including layout congestion, signal integrity and timing. A back-end designer will run through several P&R iterations and still will not be able to fix such issues satisfactorily at the layout stage. This needs to be better handled architecturally at the RTL stage, provided such implications downstream can be provided at the RTL stage.

I was impressed with Atrenta’s “Physical Lint” methodology where they have a large number of expert physical rules that can be applied to the RTL code of a design to understand its quality from the physical perspective. The checks against these rules can flag complexity issues beyond particular thresholds for complex structures such as a large mux as discussed above and others like large logic cones, cell pin densities, and so on. Having awareness about such physical implications at the RTL stage, the front-end engineers can easily fix such issues in the RTL code and do light-weight trials at the RTL stage.

To assist the front-end engineers, SpyGlass Physical has an excellent GUI for physical rule analysis and debug. The complex structures can be automatically inferred and their complexity scores listed in an ordered list, along with their references in the source code. The RTL source code can be cross probed with the schematic. The front-end engineers can take corrective actions to simplify complex structures and re-run physical rule analysis to lower the complexity scores. For example, in case of the mux as depicted in the picture above, the mux traffic can be distributed or spread more efficiently across the design. By using this method, the front-end engineers can easily comprehend the impact of complex structures on downstream tools and improve quality of the RTL to be handed over to the back-end team.

It has been observed that the design utilization can be improved significantly by resolving logic structure violations in the RTL. In the above design examples, priority was given to resolve the highest scored items, leaving remaining violations unresolved. The methodology and effort to be put on resolving the structural issues before signing off the RTL is left to the discretion of the design teams.

The RTL improvement through resolution of complex logic structures leads to faster and predictable design convergence with better quality metrics of the design. More information about the SpyGlass Physical Lint methodology can be obtained from the customer support team at Atrenta.